VSOP COMPATIBILITY TESTS AT GREEN BANK, MARCH 1996 Larry R. D'Addario 96/04/04 1. INTRODUCTION From March 5 through 8, 1996, tests of the NRAO OVLBI Earth Station in Green Bank were conducted using the VSOP Satellite Simulator constructed for ISAS by NEC. These tests were similar to those conducted in September 1994 [1] using the same equipment, but various improvements now allow more extensive tests. These include measurement of the two-way timing stability and the recording of wideband data on VLBA tapes. The tests followed a pre-established plan [2]. Initially, much of the equipment was set up in the laboratory for preliminary checks. Then the simulator was installed at a room about 220m from the earth station and the two were radiatively coupled. Nearly all of the tests were done with the simulator locked to the earth station's uplink signal. Various signals were supplied to the simulator for transmission on the downlink, including broadband noise and a coherent tone at 5.0 MHz; these were digitized and merged with header data in the simulator. Data was also supplied directly to the simulator's modulator from the NRAO Test Data Generator [3]; this allowed rough determination of bit error rates. Nori Kawaguchi of NRO, Kesato Takahashi of NEC, and Zen-Ichi Yamamoto of ISAS participated actively in the tests. 2. EQUIPMENT SETUP 2.1 The Satellite Simulator This instrument is described in [4] and its block diagram is reproduced here as Figure 1. It includes a 15.3 GHz receiver that locks a 50 MHz VCXO to the received carrier; an LO generator that produces the 14.2 GHz downlink carrier and the 128 MHz data clock using the VCXO as reference; a QPSK modulator at 14.2 GHz; and a data formatter that will digitize one or two baseband signals (in any of the VSOP modes) and insert header data to form the I and Q data streams to the modulator. There is also a diplexing filter that puts the uplink input and downlink output signals on the same coaxial port; the downlink portion of this filter limits the bandwidth to about 250 MHz. These subassemblies are equivalent to their counterparts on the satellite. In addition, the Simulator includes a controller (not part of the flight hardware) that can generate simulated header data, with the information bytes supplied by user-set switches or by a ROM that contains about 1 hour of varying header data. The main flight component not included in the simulator is the downlink power amplifier. There are two other features specifically for the ground tests. The formatter allows external downlink data signals (I, Q, and clock) to be substituted for those generated in the simulator. The external data are recaptured and differentially encoded before being supplied to the modulator, but otherwise are unprocessed. Also, the modulator output is available before the diplexer, allowing use of separate connections for the uplink and downlink signals. 2.2 Arrangement of Equipment The setup for the laboratory tests is shown in Figure 2. The "uplink" signal was supplied by an HP8672A synthesizer via a waveguide directional coupler. Three modules normally installed at the earth station's vertex were brought to the lab: the 13-16 GHz Downconverter, the 7-16 GHz Synthesizer (first LO), and the Demodulator. These were set up on the bench and followed by the spare Decoder assembly. This arrangement allowed verifying basic operation of the simulator and compatibility of most of the downlink wideband data path. More complete tests with the earth station were accomplished by radiative coupling using the setup of Figure 3. The simulator was placed in a small room and connected by about 1 m of flexible waveguide to a corrogated horn with an aperture of about 30 cm. This horn and the 45 ft antenna of the earth station were both pointed at a 0.5 m square aluminum mirror mounted 33 m above the ground on the Observatory water tower, which is about 215 m from the 45 ft antenna. The horn was equipped with a circular polarizer; we used the RCP port for both uplink and downlink, resulting in LCP at the earth station after reflection. Experiments conducted in advance of these tests showed that the link loss between the "remote" horn and the earth station's feed is about 55 dB; proper operation of the two-way link was verified using the NRAO Satellite Simulator. Whereas the simulator has no downlink power amplifier but does have the full uplink sensitivity of the actual satellite, it was necessary to reduce the uplink power. The nominal transmitter power is about +18 dBm at the front end input; this was reduced to about -22 dBm for these tests by setting the transmitter leveling loop to 10% of nominal and installing a 30 dB pad at the dewar's transmitter port. This should have produced about -77 dBm at the simulator (spec: -73 to -113 dBm). It was expected that the coupling arrangement would avoid significant multipath interference, in spite of the fact that the mirror remains in the near-field region of the 45 ft antenna. The advance tests showed that careful pointing of the 45 ft and location of the remote horn is needed to achieve this. A block diagram of the equipment used for the tests is shown in Figure 4. This includes a simplified block diagram of the earth station. Three special fixtures were built: a noise generator assembly; a 50 MHz to 5 MHz divider; and a test data checker. The first two were used to create baseband input signals to the simulator, as described later in this report. The test data checker is a simplified copy of the Test Data Generator [3]; it contains only the error counting circuitry. This made it possible to do bit error rate measurements by connecting the data generator to the simulator at the remote site and the data checker to the Decoder in the trailer. 2.3 Software Setup of the earth station for most of the tests was accomplished automatically using the command file listed in Appendix A. Automatic monitoring and data checking was done using the setup file listed in Appendix B. 3. TESTS AND RESULTS 3.1 Laboratory Tests The arrangement of Figure 2 was used to verify proper locking of the simulator and to study the effect of various kinds of modulation on the downlink spectrum and on the performance of the Demodulator and Decoder. Spectra were recorded at the Downconverter output (600 MHz) for each modulation type; these are shown in Figure 5. In all cases, the simulator was in 2-channel, 2-bit mode. We attempted to set the noise level to the nominal value of -80 dBm/Hz = -5 dBm/(32MHz) using the HP8593A spectrum analyzer's spectral density readout. Here are some observations about these spectra: a. There is no measurable residual carrier, regardless of modulation type, even at the highest available spectrum analyzer resolution. This implies carrier suppression of at least 60 dB. b. There is considerable dissimilarity between the simulator's A and B channels. Leaving each input open while driving the other with noise produced rather different spectra; terminating the open input with 50 ohms produced no change. This might be explained by d.c. offsets in the digitizers, but we see a similar effect if we drive one channel with a -5 dBm tone and the other with noise, then reverse them. c. For all modulations, the upper sidelobe (lower sidelobe at RF) is about 4 dB stronger than the lower one. (But later measurements at RF and before the diplexing filter do not show this. See Figure 6.) d. There is a small amount of clock leakage at +-64 MHz. When the simulator's digitizers are used, there are deep nulls in the modulation spectrum near (but not quite at) this point. When the NRAO data generator is used, the nulls are much shallower. Note that in the former case the clock is synchronous with the carrier, but in the latter case it is not. Performance of the Demodulator in maintaining carrier lock and clock lock was confusing. In earlier laboratory tests using the NRAO test modulator at IF, carrier (Costas loop) lock was achieved for module input levels from -7 to -35 dBm (spec: -10 to -30 dBm) without noise, and from about -10 to -32 dBm at Eb/N0=10dB (LRD lab notes, 960302). But in the present tests (without noise), reliable lock was obtained down to -35 dB with all modulations (no noise), but not above -13 dBm. The upper end of the range was modulation-dependent, and was much lower under some conditions: Modulation Max Level NRAO Gen. -13 dBm Sim 2b 2ch -14.5 Sim 1b 2ch -21 Sim 2b 1ch=A -15.5 Sim 2b 1ch=B -16.5 This is not understood. The Decoder performance was about as expected. Sync was reliably maintained with data from either the simulator or the NRAO test generator. The latter showed a residual error rate of about 5e-7, which could be due to ground loop noise in the interconnections of the bench setup. Completion of the laboratory tests was delayed about one-half day because of a component failure in the 7-16 GHz Synthesizer module (a bad trimpot caused the coarse tuning to be miscalibrated). 3.2 Remote Configuration -- General Results Additional spectra were recorded with the simulator locked to the uplink from the earth station. Figure 6 shows spectra at the simulator's KMOD-2 port (before the diplexing filter) for various modes with noise into both baseband channels (level uncertain). Figure 7 shows spectra after transmission across the link, at IF (IF distributor output). 3.3 Two-Way Phase Stability With the simulator at the remote site and locked to the earth station's uplink, the downlink residual phase was recorded for long intervals of time. Overnight runs were made on March 7 and 9, and runs of 1 and 1.5 hours were made on March 8. Several kinds of "Doppler" were simulated by using fake orbit files: (a) constant range, producing constant residual phase (zero residual Doppler) if the instrumental phase and signal paths are stable; (b) constant uplink range-rate and constant downlink range, producing linearly increasing phase (constant Doppler) if all is stable; and (c) constant and equal range-rates on uplink and downlink, again producing constant phase (zero Doppler). For (b) and (c), the simulated rate corresponded to a fractional frequency change of 1e-8 (140.2 Hz at the downlink frequency). Results are plotted in Figure 8. Note the differences in time and phase scales on the various plots. The runs represented by the upper two plots were made with simulated residual Doppler of zero. The large phase changes during the first 2 hours in Fig 8a are believed to be due to the simulator; its temperature was dropping rapidly during this time, as a cold front crossed Green Bank during the night. The run plotted in Fig. 8c was taken with both the uplink and downlink offset by 1e-5 (153 kHz and 142 kHz, respectively), producing zero net Doppler. The runs in Figs. 8b and 8d included simulated residual Doppler of 1e-8 (142 Hz); a phase slope of this amount was subtraced from the measured data before plotting. Nevertheless, a residual slope of 1.445e-4 Hz remains. This is at present unexplained, but is believed to be a roundoff error somewhere in the software. Other tests show that it is proportional to the residual Doppler. The sharp, downward fluctuations in Fig. 8d are believed to be due to wind blowing on the water tower; they are typically about 0.1 cycle in amplitude, corresponding to 0.5 mm movement of the flat mirror (1 mm change in 1-way path, 2 mm change in 2-way path). For each of the above runs, the Allen standard deviation was calculated as a function of time delay; these results are plotted in Figure 9. For all runs, the curves correspond to an rms timing error of about 1 psec for intervals up to 300 sec. The two runs with simulated residual Doppler of 1e-8 then show a flattening at Allen standard deviation 1e-14; this is due to the erroneous residual of 1.4e-4 Hz. The other runs continue to show lower values at longer times, with some evidence of flattening toward 3 psec rms. This implies a drift of this order over several hours; it corresponds to .045 cycles at 14.2 GHz, and this can also be seen in Figs. 8a,c. 3.3 Header Data Extraction and Recording Whenever the downlink was established from the simulator to the station, the header information was extracted from the data stream and written to the log file. This process involved low-level software running in the Decoder's microprocessor as well as software running in the station computer. The low-level software handles every frame, decoding the 25-frame blocks and 16-type groups of data; this is completely unchanged since the September 1994 test; details are given in [5]. Normally, a complete set of header data is transmitted every 2 sec; the higher-level software runs whenever a new set has been completed. This software has undergone only minor changes since September 1994. During the overnight phase stability runs, the simulator was using its internal digitizers and formatter, with the header data coming from its ROM. Thus, several repeats of the ROM content (4096 sec) were recorded continuously. The data from one long run were converted to VSOG transfer format [6] and made available to ISAS for checking. We have so far done very little analysis of this data ourselves, except to note that short groups occur about every 502 or 504 seconds. That is, we get a group of only 15 header types instead of the normal 16. Such events are expected occaisionally because the data generation clock is asynchronous with the data transmission clock (the latter being locked to the uplink). The observed rate of short groups implies a clock offset of 1 part in 4000, which seems high; we do not yet know whether this is reasonable for the simulator. At this point, we cannot rule out the possibility that data was missed because of a timing error in our software. The low-level software includes several data quality counters from which the rate of byte errors could be derived. However, higher level software to log these counter readings was not available during these tests. 3.4 Tape Recording 3.4.1 16-track Mode. Using 128-2-2 mode in the simulator, and VLBA1:1 mode in the Formatter, data was written to both tape drives simultaneously. "Thick" (25 micron) tapes were used, and the data density was 33000 bpi. Track assignments and head positions were intended to comply with [7]. A total of 6 tape passes was written, with different baseband inputs to the simulator in each case. On each pass, 16 tracks were active (either even- or odd-numbered tracks). Details of the setup are given in Appendix C. The tapes were sent to the VLBA correlator in Socorro for analysis. It was expected that cross-correlation of the data from the two tapes would yield near 100% correlation at zero fringe rate and the known delay of the noise; and about 0.1% correlation between channels containing the tone at all other delays. Also, autocorrelation spectra should be fairly flat, with the tone at the appropriate level and frequency. Results of these tests are not yet available; they will be described in a separate report. 3.4.2 32-track Mode. Similarly, one tape was written using simulator mode 128-2-2 and Formatter mode VLBA1:2, so that 32 tracks were written simultaneously. This mode is intended to be used for tapes that will be read at the Mitaka copying machine. Again, it was a thick tape at 33000 bpi. Track assignments were intended to comply with those suggested in [8]. Details of the setup for each tape pass are given in Appendix C. Unfortunately, it was later discovered that the track assignments were not programmed correctly. This resulted in half of the intended tape tracks not being recorded at all, and the other half being duplicated on two different tracks. Although the tape was sent to Japan for checking, no detailed evaluation of the data is expected to be possible. However, gross verification of the tape readability (including header information) should be achievable. 3.5 Tone Detection It was desired to simulate the injection and synchronous detection of the calibration tones that will be present on the satellite. The spacecraft will inject short pulses into the receiver inputs at a rate of 1 MHz, producing a "comb" of tones in the baseband outputs at harmonics of 1 MHz. The power in the tones is nominally 0.4% of the total power, and the pulse generator is synchronous with the uplink signal. 3.5.1 Tone Generation. We did not have hardware available to simulate this in our tests, but we did construct a fixture to generate a single tone at 5 MHz that is synchronous with the uplink. The arrangement is shown in Figure 4. The simulator's uplink receiver locks a 50 MHz VCXO to the received signal, and this signal is available at an external connector. Part of the 50 MHz output is used to drive a 10x divider and 5 MHz band pass filter. As shown in Figure 4, the 5 MHz tone can be added to the noise signal of one baseband channel. Its level was adjusted to be -35 dBm, whereas the noise PSD is -5 dBm/32MHz. In another setup (not shown), the tone alone was used as the baseband input signal (no noise) at a level of -3 to -5 dBm. 3.5.2 Tone Detection. During the VSOP mission, a subset of the injected tones will be synchronously detected by the tone extraction hardware of the VLBA Formatter. The results will then be written to the log. During the present tests, neither the software to control the tone extractors nor the software to write the results to the log was ready; however, VLBA screens for manual control of the extractors and display of the results were available, and these were used to verify proper operation. At the end of Pass 3 of the 16-track tape test (the end of test 2), the Phase Cal Extraction screen was used to measure the tone. Although the signals were quantized to two bits, the extractors were operated in 1-bit mode, with the MSB and LSB treated separately. The settings and results are tabulated below: Form Freq Amp Phase | Form Freq Amp Phase Note Chan kHz % degree | Chan kHz % degree ==== ==== ====== ====== | ==== ===== ===== ======= ================== 3 3000 1.39 11.5 | 7 3000 1.35 11.9 Channel A0 MSB|LSB 3 1000 0.38 150.8 | 7 1000 0.48 144.0 Channel A0 MSB|LSB 1 3000 1.44 120.3 | 15 3000 1.27 125.3 Channel A1 MSB|LSB 1 1000 0.44 21.3 | 15 1000 0.41 23.6 Channel A1 MSB|LSB 2 3000 0.31 23.1 | 6 3000 0.29 14.3 Channel B0 MSB|LSB 2 1000 0.19 57.0 | 6 1000 0.11 38.0 Channel B0 MSB|LSB 0 3000 0.23 -151.6 | 14 3000 0.14 -159.1 Channel B1 MSB|LSB 0 1000 0.15 -105.3 | 14 1000 0.14 96.0 Channel B1 MSB|LSB Note that at this time the tone was in channel A only, and was weak (0.1% in power, 0.31% in voltage). Whereas the Formatter input is fanned out by 1:4, the 5 MHz tone is aliased to 3 MHz when seen by any single extractor. Furthermore, an extractor set to 1 MHz will also be somewhat sensitive to the tone because it is the 5th harmonic of the programmed frequency. Qualitatively, these expectations are confirmed by the measurements. 3.6 Bit Error Rate Measurement By operating the simulator with the NRAO test data generator, it is possible to use the NRAO test data checker to count errors in the data portion of each downlink frame. The generator produces bit streams with VSOP-format headers and pseudo-random noise in the data portion of each frame. The checker is connected in place of the tape recording system, at the decoder output. To simplify the design of the checker, it looks only at half of the 16 bitstreams coming out of the decoder (either those coming from the I channel or the Q channel of the downlink, after differential decoding). The checker ignores the part of each frame corresponding to the downlink header, since this has been replaced by a different PRN sequence in the decoder. For further details on the operation of the data generator and data checker, see [3]. We did not have time to perform carefully calibrated measurements of error rate vs. signal-to-noise ratio. Although the checker gives an accurate measure of BER, the SNR could only be estimated roughly. The SNR was varied by inserting attenuators at the simulator's RF port ("KDIP-1"). Results are shown in the table below and plotted in Figure 10. RF Atten IF Atten BER BER at Sim. in Rcvr checker sync err 0 dB 31 dB 5.0e-6 <2.6e-7 0/10m 3 31 4.2e-6 <2.6e-7 0/10m 10 31 3.3e-6 <2.2e-7 0/12m 13 18 3.4e-6 <1.7e-7 0/20m <5.9e-9 0/458m 20 12 3.2e-5 2.0e-5 23/5m The last column gives an estimate of BER by another method. The decoder checks all bits of the sync word in every frame, and reports any errors. Whereas the sync word is only 32 bits, far fewer bits are checked this way than with the data checker. However, the result was that, except for the case with the 20 dB attenuator, no errors at all were detected. This gives upper limits on BER that were in all cases smaller than the rates measured by the checker; see further discussion below. With the 13 dB attenuator installed, a rough estimate of the SNR was made with an HP 8593A spectrum analyzer connected to the receiver IF (specifically, at the IF Distributor front panel monitor point in the equipment building). The simulator was set to provide an unmodulated carrier; its indicated power on the spectrum analyzer was -23.8 dBm, while the indicated PSD at 3 MHz offset was -124.7 dBm/Hz. The latter used the spectrum analyzer's PSD readout feature. Assuming that the latter is well calibrated and that the modulated power from the simulator is the same as the unmodulated power, this implies Eb/N0=19.83 dB at 128 Mb/s. I estimate that this is accurate to +-2dB. The SNRs with the other attenuators installed should vary proportionally. For SNRs at this level and higher, negligible error rate (<1e-11) is expected for an ideal QPSK transmission system. With the 20 dB attenuator, the error rate observed (by either method) would be about 3.5 dB worse than ideal; this is consistent with the results of earlier laboratory tests of our hardware. The error rate "floor" of about 2e-6 at very high SNR is puzzling. Note that it is not confirmed by the sync error counts. No sync errors were seen for periods of 10-20 minutes, leading to upper limits of 2e-7; and an overnight run with the 13 dB attenuator gave no sync errors in 7.6 hours, for an upper limit of 6e-9. We suspect that there is a systematic effect that is frame-synchronous, perhaps a modulation of the bit timing or a periodic amplitude glitch, but it is hard to tell whether it is in the data generator, the demodulator, the decoder, or the data checker. There is also evidence of byte-synchronous errors, since certain bitstreams in the decoder output consistently show much higher BER than others. (Three weeks after completion of these tests, similar tests were conducted with the NRAO satellite simulator substituted for the NEC/ISAS simulator. An error rate floor of 1.3e-7 was observed, and the byte-synchronous error pattern was confirmed. It therefore seems unlikely that much of the residual error is due to the simulator. This is also confirmed by the fact that the NEC/ISAS simulator was used at the Goldstone station the next week, where error rates as low as 1e-11 were measured at high SNR. This will be further investigated.) REFERENCES (Files shown in brackets are available anonymously from 'ftp.gb.nrao.edu'.) [1] L. D'Addario, "VSOP compatibility tests at Green Bank, September 1994." NRAO internal report, 94/10/09. Hard copy available from the author (ldaddari@nrao.edu). Text only:[ovlbi/doc/vsopTestSep94.report]. [2] L. D'Addario, "VSOP compatibility test plan." NRAO internal report, 96/02/14. [ovlbi/doc/vsopTestPlanMar96.txt] [3] R. Escoffier, "The OVLBI decoder test fixture." OVLBI-ES Memo No. 49, 94/08/29. [ovlbi/memoseries/es49_testfixture.txt] [4] NEC, "Muses-B Observation Subsystem Simulator: Guide Book," Oct 1994 update. [5] L. D'Addario, "VSOP header processing design document." NRAO OVLBI documentation file, 94/12/02. [ovlbi/doc/vsopHeaderProc.doc] [6] Y. Murata, "VSOP Science Header Data Format," dated 95/09/01. [7] J. Ulvestad and J. Romney, "Recording VSOP data on VLBA tapes." Version 2.0, 95/12/17. [8] L. D'Addario, "Track assignments for 32-track VLBA recordings," memo to N. Kawaguchi dated 96/01/23, revised 96/03/16. APPENDIX A: LISTING OF TEST SETUP COMMAND FILE # HISTORY # 960304 GIL Initial version # 960304 LRD Revised quite a bit. # 960307 LRD Change phr file name; delete COPYFILE; change orbit to # 1e-8 offset # 960308 LRD Increase test duration to 6h. # 960309 LRD No idle.cmd. UPPOWER from .15 to .30. # Software SETMODE 2 SATELLITE VSOP DEFINE PHASEFILE=/hd0/out/960309.test.phr MONCHK FILE=monitorVsop.dat ANOMALY=anomaly.dat # Decoder and formater DECODER RATE=64 INPUT=REC COMMAND=INTERRUPT INVALID=PASS FORMAT FORMAT=VLBA1:1 RATE=8M NCHAN=16 BITS=1 EVEN # Downlink SYNTHES UNIT=2CM FREQ=13.6 DOWNCONV UNIT=2CM ATTENA=24 ATTENB=31 TRANSFER=0 TWTMODE MODE=3 DOWNFREQ=14.2000e9 LO2FREQ=610e6 # tune Demodulator to 600.0 MHz: DEMOD INPUT=VSOP CLOCK=64 TUNE=600e6 INHIBIT=0 DEMOD INPUT=VSOP CLOCK=64 CODE=0x536 INHIBIT=0 # Uplink (allow slight delay for switching xmtr on) TWTMODE XMTR=ON 0:00:02 TWTMODE UPFREQ=15.3e9 UPPOWER=0.30 # Antenna STARTUP BRAKEOFF # Just in case: TRACK STOP ACU AZEL=93d15',7d48' BRAKEON # Track the water Tower position, with no doppler shift. TRACK zen2.orb # Start TWT task 0:00:45 TWT FILE=PHASEFILE 0:01:00 TWTMODE ZERO # Acquire 0h01m00 ACQUIRE CHANNEL=2 TIMEOUT=30s MINSIGNAL=-2.7 RADIUS=10' 6h01m00 TWT STOP MESSAGE vsopTest1 finished. # INCLUDE idle.cmd APPENDIX B: LISTING OF MONITORING/CHECKING SETUP FILE # File monitorVsop.dat # OVLBI monchk initialization file # # function label description passes bytes monitor log # | | | |unit| anoms | | # | | | | | | | | | monchkUps "UPSSTATE" "Uninteruptable Power Supply" 1 0 44 3 TENSEC TENMIN monchkGps "GPSTIME" "GPS Timing status" 1 0 34 3 TENSEC TENMIN monchkACU "ACU " "ACU status and positions" 2 0 36 10 ONEMIN ONEMIN monchkFE "FEX" "X band Front End status" 2 0 40 10 TENMIN TENMIN monchkFE "FEK" "Ku band Front End status" 2 1 40 10 TENMIN TENMIN monchkTWT "TWT" "Two-way timing status" 1 0 28 11 ONEMIN FIVEMIN monchkSyn "SYNK" "Check Ku synthesizer" 2 1 4 13 ONEMIN NOLOG monchkSyn "SYNX" "Check X synthesizer" 2 0 4 13 ONEMIN NOLOG monchkDecState "DECSTATE" "Decoder Status Bit check" 1 0 4 7 ONEMIN ONEMIN monchkDecMode "DECMODE" "Decoder Mode Bit check" 1 0 4 9 ONEMIN TEMMIN monchkDecFrame "DECFRAME" "Decoder Frame errors" 1 0 56 8 ONEMIN TENMIN monchkDecTime "DECTIME" "Decoder Time check" 1 0 20 2 TENSEC TENMIN vsopHCount "DECHCOUNT" "VSOP header proc. Counts" 1 0 16 0 ONEMIN ONEMIN vsopProcHeader "DECRAW HEAD" "VSOP raw headers" 1 0 96 0 ONESEC NOLOG getVsopTotalPower "DECPOWER" "VSOP total power data" 1 0 64 0 ONESEC NOLOG vsopHeaderTPReset "DECTOTAL" "VSOP total power data" 1 0 64 0 ONEMIN ONEMIN monchkDemod "DEM" "Demodulator status" 2 0 28 6 TWOSEC TENSEC monWx "weather" "Weather station" 2 0 20 0 TENMIN TENMIN mcHelium "HeComp" "Helium compressor" 1 0 16 3 TENMIN TENMIN monRtm "rtphase" "500MHz cable delay" 2 0 d 0 ONEMIN ONEMIN #monphase "twtphase" "TWT residual phase" 1 0 d 0 TENSEC ONEMIN getTemps "temps" "Electronics rack temperatures" 2 0 20 2 ONEMIN TENMIN chkErrno "errno" "Task errors" 1 0 24 6 ONEMIN NOLOG APPENDIX C: TESTS RECORDED ON TAPE Subj: VSOP Compatibility Test: Tape test Date: 1996 March 7 This document summarizes plan for writing VSOP simulator data to VLBA data recorders. Data was written to two thick tapes in 16 track VLBA format and to one thick tape in 32 track mode. The two tapes written using 16 tracks were written simultaneously. Test Plan ========= A total of four test data types was written to tape. The frequency for the tone test was 5 MHz, and was coherent with the uplink tone. Noise2 is identical to Noise1, except delayed by ~51 nanoseconds relative to Noise1. 1) Noise1 in Channel A Noise2 in Channel B 2) Noise1 + Tone in Channel A Noise2 in Channel B 3) Noise2 in Channel A Noise1 + Tone in Channel B 4) Noise1 in Channel A Tone in Channel B In all tests, the noise level at the simulator's baseband inputs was -80 dBm/Hz (0.1 to 150 MHz). The tone level was -35 dBm for all except test 4, when it was -3.2 dBm. 16 Track Mode ============= Tape speed was 266.67 in/sec. The tape motion was essentially continuous, except for changes in tape direction at the ends of the tape. A total of 28 passes is required to fill a VLBA tape in 16 track mode; only the first 6 passes were used for this test. Pass Head Odd/Even Forward/Back Barrel Activity ==== ==== ======== ============ ====== ======== 1 -319 Even Forward Off Test 1 2 + 31 Even Back Off Transition; Test 2 3 -319 Odd Forward Off Test 2 4 + 31 Odd Back 16 Transition; Test 3 5 -271 Even Forward Off Test 3; Transition 6 + 79 Even Back 16 Test 4 32 Track Mode ============= Only one tape was written for the 32 track tape test. Data were written to tape for the first half of each 32 track tape pass, approximately 400s. During the second half of each tape pass, the inputs to the satellite simulator were changed. Tape speed is 133.33 in/sec. The tape motion was essentially continuous, except for changes in tape direction at the ends of the tape. A total of 14 passes of the tape is required to fill a VLBA tape in 32 track mode; only the first 4 passes were for the 32 track test. Pass Head Odd/Even Forward/Back Activity ==== ==== ======== ============ ======== 1 -319 Both Forward Test 1 + Transition 2 + 31 Both Back Test 2 + Transition 3 -271 Both Forward Test 3 4 + 79 Both Back Test 3 FIGURE CAPTIONS Fig 1: VSOP Simulator Block Diagram. Fig 2: Equipment arrangement for laboratory tests. Fig 3: Link geometry for tests in which the simulator is coupled radiatively to the earth station. Note that the mirror on the water tower is in the near field of the 45-foot antenna. Fig 4: Equipment arrangement for radiatively coupled tests. Fig 5: Modulated downlink signal spectra, measured at IF (600 MHz) in the laboratory. (a) Noise to chan A, delayed noise to chan B. (b) Noise to one channel, other channel open. (c) Noise to chan A, 5 MHz @ -5 dBm to chan B. (d) 5 MHz @ -5 dBm to chan A, noise to chan B. (e) NRAO Test Data Generator to I,Q,Clk inputs. Fig 6: Modulated downlink signal spectra, measured at the output of the simulator's modulator (14.2 GHz). (a)-(d) Noise to chan A, delayed noise to chan B: (a) 16 MHz, 2 bit, 2 chan mode; (b) 32-1-2; (c) 32-2-chA; (d) 32-2-chB. (e)-(f) NRAO Test Data Generator to I, Q, Clk inputs: (e) Test Generator's differential encoder on (abnormal); (f) Test Generator's differential encoder off (normal). Fig 7: Modulated downlink signal spectra, measured at IF after transmission across the link to the earth station. (a)-(d) Noise to A, delayed noise to B. (a) 16 MHz, 2 bit, 2 chan mode; (b) 32-1-2; (c) 32-2-chA; (d) 32-2-chB. (e) NRAO Test Data Generator, differential encoder ON. Fig 8: Residual phase vs. time for four separate overnight runs. (a) Predicted uplink and downlink delays held constant (zero Doppler). (b) Predicted delay rates 1e-5 (zero residual Doppler). (c) Predicted uplink delay rate 1e-8 (residual Doppler 142.0 Hz); slope of 142.0 Hz removed before plotting. Unexplained residual slope of .0001455 Hz. (d) Same as (c), but longer run and lower SNR due to 13 dB attenuator at simulator's RF port. Fig 9: Allen standard deviation of residual phase for each of the four runs of Figure 8. Fig 10: Bit error rate vs. simulator output attenuator, by two different methods.